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| (R) EMIF04-10006F1 IPADTM 4 LINES EMI FILTER AND ESD PROTECTION MAIN PRODUCT CHARACTERISTICS Where EMI filtering in ESD sensitive equipment is required: Mobile phones and communication systems Computers, printers and MCU Boards s s (R) DESCRIPTION The EMIF04-10006F1 is a highly integrated devices designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF04 flip-chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents the device from destruction when subjected to ESD surges up 15kV. This device includes four EMIF filters and 4 separated ESD diodes. BENEFITS EMI symmetrical (I/O) low-pass filter High efficiency in EMI filtering Very low PCB space consuming: 2.92mm x 1.29mm Very thin package: 0.65 mm High efficiency in ESD suppression (IEC61000-4-2 level 4) High reliability offered by monolithic integration High reducing of parasitic elements through integration and wafer level packaging. COMPLIES WITH THE FOLLOWING STANDARDS : IEC 61000-4-2 level 4: s s s s s s s Flip-Chip package PIN CONFIGURATION (ball side) 9 8 7 6 5 4 3 2 1 D3 Gnd D4 I4 I3 Gnd O3 I2 I1 Gnd D1 A B O4 O2 O1 D2 C 15kV 8 kV (air discharge) (contact discharge) MIL STD 883E - Method 3015-6 Class 3 BASIC CELL CONFIGURATION Input 1 Output 1 Input 4 Output 4 Input 2 Output 2 D1 D2 Input 3 Output 3 D3 D4 GND Filtering cells: Ri/o = 100 Cline = 60pF TM : IPAD is a trademark of STMicroelectronics. January 2003 - Ed: 1 1/6 EMIF04-10006F1 ABSOLUTE RATINGS (limiting values) Symbol PR PT Tj Top Tstg Parameter and test conditions DC power per resistance Total DC power per package Maximum junction temperature Operating temperature range Storage temperature range Value 0.1 0.6 125 -40 to + 85 125 Unit W W C C C ELECTRICAL CHARACTERISTICS (Tamb = 25 C) Symbol VBR IRM VRM VCL Rd IPP RI/O Cline Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage VCL VBR VRM VF IRM IR V I IF Clamping voltage Dynamic impedance Peak pulse current Series resistance between Input and Output Input capacitance per line IPP Symbol VBR IRM RI/O Cline IR = 1 mA Test conditions Min. 5.5 Typ. 7 Max. 9 500 Unit V nA pF VRM = 3.3 V per line I = 10 mA VR = 2.5 V, F = 1 MHz, 30 mV (on filter cells) 80 50 100 60 120 70 2/6 EMIF04-10006F1 Fig. 1: S21 (dB) attenuation measurements and Aplac simulation. Aplac 7.62 User: ST Microelectronics 00 dB Fig. 2: Analog crosstalk measurements. Aplac 7.62 User: ST Microelectronics 00 dB -12.5 -25 i3_o2.s2p -25 -50 -37.5 i3-o3-load Simulation f/Hz -50 1M 3M 10M 30M 100M 300M 1G 3G -75 -100 100k 1M 10M 100M 1G f/Hz Fig. 3: Digital crosstalk measurements. Fig. 4: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and one output V(out). Fig. 5: ESD response to IEC61000-4-2 (-15kV air discharge) on one input V(in) and one output V(out). Fig. 6: Line capacitance versus applied voltage for filter. C(pF) 100 90 80 70 60 50 40 30 20 10 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 F=1MHz Vosc=30mVRMS Tj=25C VR(V) 3/6 EMIF04-10006F1 Aplac model Rbump Ii* Cz=41pF@0V Cbump Rsub Cz=41pF@0V Rsub Cbump Rsub Rbump Lbump Rs=100 Lbump Rbump Oi* sub Oi * = Output of each filter cell Ii* = Input of each filter cell sub Lbump Rbump Dj * Lbump Lbump Rbump Di* Cgnd Lgnd Cz=41pF@0V Cbump Rsub With Dj* = D1 & D3 And Di* = D2 & D4 Cz=41pF@0V Rsub Cbump Rgnd sub EMIF04-10006F1 model Ground return for each GND bump Aplac parameters aplacvar Rs aplacvar Cz aplacvar Lbump aplacvar Rbump aplacvar Cbump aplacvar Rsub aplacvar Rgnd aplacvar Lgnd aplacvar Cgnd 100 41 pF 50 pH 20 m 1.2 pF 100 m 100 m 100 pH 0.15 pF 4/6 EMIF04-10006F1 ORDER CODE EMIF EMI Filter Number of lines yy - xxx zz F 1 Pitch = 500m Bump = 315m FLIP CHIP x: resistance value () z: capacitance value / 10 (pF) or application (3 letters) and version (2 digits) PACKAGE MECHANICAL DATA 315m 50 500m 50 250m 50 435m 50 650m 65 50 1 m 5 2.92mm 50m FOOT PRINT RECOMMENDATIONS MARKING 1.29mm 50m 0 Copper pad Diameter : 250m recommended , 300m max Dot, ST logo xxx = marking yww = datecode (y = year ww = week) 545 400 545 Solder stencil opening : 330m Solder mask opening recommendation : 340m min for 300m copper pad diameter xxx yww 100 230 All dimensions in m 5/6 EMIF04-10006F1 FLIP-CHIP TAPE AND REEL SPECIFICATION Dot identifying Pin A1 location 4 +/- 0.1 O 1.5 +/- 0.1 1.75 +/- 0.1 3.5 +/- 0.1 0.73 +/- 0.05 All dimensions in mm 8 +/- 0.3 ST ST ST xxx yww User direction of unreeling xxx yww xxx yww 4 +/- 0.1 OTHER INFORMATION Ordering code EMIF04-10006F1 Marking FST Package Flip-Chip Weight 5.4 mg Base qty 5000 Delivery mode Tape & reel Note: More packing informations are available in the application note AN1235: ''Flip-Chip: Package description and recommandations for use'' Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 6/6 |
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